oplink communications, in c. parameter symbol minimum maximum units storage temperature t st - 40 + 85 c operating temperature i option t op - 40 + 85 c h option 0 + 70 operating & storage humidity - - 85 % supply voltage v cc 0 + 6.0 v lead soldering temperature & time - - 260c, 10 sec absolute maximum ratings oc-12/stm-4 receiver with clock recovery src12 series the src12 is a receiver module with internal clock recovery designed to meet or exceed the sonet/sdh optical interface requirements at oc-12/ stm-4 (622 mb/s) data rate. highly reliable ingaas/inp pin photodiodes are used to cover the entire long wavelength range from 1100 nm to 1550 nm. the receiver features a low noise gaas transimpedance ic with agc ca- pability to provide an extremely wide dynamic range and high sensitivity. a phase lock loop (pll) circuit is included to perform the clock recovery function and resampling of the data. the src12 receiver requires a single +5 v supply. the data & clockinter- face signals are differential pecl while the signal detect outputs have ttl interface. the src12 module can operate over an operating temperature range of 0c to +70c (h option) or -40c to +85c (i option). it is housed in a 20-pin dual-in-line metal package with integral st, fc or sc connector receptacle or fiber pigtail (50 m multimode fiber). the fiber pigtail is ter- minated with st, fc or sc connector. related oc-12/stm-4 transmitters & receivers stx-12: 20-pin laser transmitter srx-12: 20-pin receiver without clock recovery (pecl signal detect) srx-12-l: 20-pin receiver without clock recovery (ttl signal detect) src-12-s: 24-pin receiver with clock recovery product description ? full compliance with sonet/sdh oc-12/ stm-4 specifications ? long reach and intermediate reach ? phase-lock-loop (pll) clock recovery ? - 40c to +85c operating temperature (i option) ? multi-sourced 20-pin dip metal package ? fc, st, sc-connectorized fiber pigtails or integral fc, sc or st connector receptacle ? pecl data & clock interface ? ttl signal detect interface features r5.2008.06.04
oplink communications, in c. interface circuit signal detect+ signal detect - 14 1, 13, 20 6, 8, 15 12 11 (ttl levels) 7 9 4 5 130 82 r esistor values are in ohm, capacitor values are in f unless otherwise indicated 130130 8282 (pecl levels) (pecl levels) data+ clock+ data - clock - 130 82 +5 volt 10 0.01 + 1 h coil or ferrite inductor 10 0.1 src-12 receiver performance characteristics (over operating case temperature) src12 series parameter symbol minimum typical maximum units data rate b - m + m s i snsiii - b p min - - - dbm aximm in oia p - b p max - - dbm sina tsds inasin li in p sd+ - - - dbm asin li in p sd- - - - dbm sina hssis - - db an oain clk j - - ims ji tan tans nin mian i it mmndain siid in a oia in p i sin md i and masd a nm an i - pbs receiver electrical interface (over operating case temperature) parameter symbol minimum typical maximum units supply voltage v cc v s cn i cc - m o hih va t clock v oh v cc - - v cc - v o lo va t clock v ol v cc - - v cc - v o hih va sil tct v oh - v cc v o lo va sil tct v ol - v i minain m v cc - v 2 24
application notes receiver circuit: the receiver converts the incident optical power to a photocurrent via a high performance pin photodiode. the photocurrent is converted to a voltage signal by a transimpedance amplifier. this signal is then amplified by additional gain stages and processed through a shaping filter and a comparator to generate the data to the clock recovery circuit. the clock recovery circuit uses a phase lock loop (pll) to recover the clock from the data and resamples the data to generate clean and reshaped differential dataoutputs. also provided are differential recovered clock outputs. both differential data+ and data- as well as clock+ and clock- outputs are open emitter pecl levels requiring termination (50 ohms to v cc - 2 volts or 510 ohms to gnd is recommended). for optimum performance, both outputs should be terminated in the same manner, even if only one is used. the signal detect circuit monitors the level of the incoming optical signal and generates a logic low (ttl) signal when insufficient photocurrent is produced. when this happens, the clock+ and clock- outputs are locked to an internal reference frequency of 622.08 0.2 mhz, the data+ output is held at logic high and the data- output is held at logic low. interface circuit: the power supply line should be wellfiltered. the power supply should be bypassed by 0.01 or 0.1 f ceramic chip capacitors placed as close to the receiver module as possible. if the receiver outputs drive long traces or multiple loads, the use of an ecl buffer gate to isolate the receiver from transmission line reflections is recommended. oplink communications, in c. pin assignments (top view) pigtail package data & clock timing diagram all case pins should be grounded dimension in inches 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 case n/c n/c clock + clock - data+ gnd gnd data - n/c case n/c n/c n/c n/c gnd signal detect - case signal detect+ v (+5 v) cc n/c: no internal connection data clock set-up 450 ps typical hold 450 ps typical the pigtail length from the package edge is 1.0 meter minimum, 1.1 meter typical. src12 series 3 r5.2008.06.04
46335 landing parkway fremont, ca 94538-6407 tel: (510) 933-7200 fax: (510) 933-7300 email: sales@oplink.com oplink communications, inc. reserves the right to make changes in equipment design or specifcations without notice. information supplied by oplink commu- nications, inc. is believed to be accurate and reliable. however, no responsibility is assumed by oplink communications, inc. for its use nor for any infringements of third parties, which may result from its use. no license is granted by implication or otherwise under any patent right of oplink communications, inc. ? 2008, oplink communications, inc. st receptacle package dimension in inches dimension in inches dimension in inches sc-receptacled package fc-receptacled package src12 series r5.2008.06.04 4 src 000 2 x r 1 8 1 supply voltage rx only 5v= 8 temperature range connector type & option pigtail fc= p1 pigtail st= p2 pigtail sc= p3 st connector= c1 fc connector= c2 sc connector= c3 -40 ~85?c= i 0~70?c= h receivers wavelength range 1100~1600nm pin ordering information
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